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authorJean Delvare <khali@linux-fr.org>2012-04-28 15:32:06 +0200
committerWolfram Sang <w.sang@pengutronix.de>2012-05-12 14:28:18 +0200
commite7065e20d9a6a8ee4a8b31ebe71d6c00a0f45354 (patch)
tree2f219f7db3371d477733bbcf6d8f56e5bac1cf69 /Documentation/i2c/muxes/i2c-mux-gpio
parent353f56b5f3093b6d75e81f523a8b10748a40f278 (diff)
downloadlwn-e7065e20d9a6a8ee4a8b31ebe71d6c00a0f45354.tar.gz
lwn-e7065e20d9a6a8ee4a8b31ebe71d6c00a0f45354.zip
i2c: Rename last mux driver to standard pattern
Update the MAINTAINERS entry and all other references accordingly. Based on an original patch by Wolfram Sang. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Peter Korsgaard <peter.korsgaard@barco.com> [wsa: fixed merge conflict due to rework in i2c_add_mux_adapter()] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'Documentation/i2c/muxes/i2c-mux-gpio')
-rw-r--r--Documentation/i2c/muxes/i2c-mux-gpio65
1 files changed, 65 insertions, 0 deletions
diff --git a/Documentation/i2c/muxes/i2c-mux-gpio b/Documentation/i2c/muxes/i2c-mux-gpio
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index 000000000000..bd9b2299b739
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+Kernel driver i2c-gpio-mux
+
+Author: Peter Korsgaard <peter.korsgaard@barco.com>
+
+Description
+-----------
+
+i2c-gpio-mux is an i2c mux driver providing access to I2C bus segments
+from a master I2C bus and a hardware MUX controlled through GPIO pins.
+
+E.G.:
+
+ ---------- ---------- Bus segment 1 - - - - -
+ | | SCL/SDA | |-------------- | |
+ | |------------| |
+ | | | | Bus segment 2 | |
+ | Linux | GPIO 1..N | MUX |--------------- Devices
+ | |------------| | | |
+ | | | | Bus segment M
+ | | | |---------------| |
+ ---------- ---------- - - - - -
+
+SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
+according to the settings of the GPIO pins 1..N.
+
+Usage
+-----
+
+i2c-gpio-mux uses the platform bus, so you need to provide a struct
+platform_device with the platform_data pointing to a struct
+gpio_i2cmux_platform_data with the I2C adapter number of the master
+bus, the number of bus segments to create and the GPIO pins used
+to control it. See include/linux/i2c-gpio-mux.h for details.
+
+E.G. something like this for a MUX providing 4 bus segments
+controlled through 3 GPIO pins:
+
+#include <linux/i2c-gpio-mux.h>
+#include <linux/platform_device.h>
+
+static const unsigned myboard_gpiomux_gpios[] = {
+ AT91_PIN_PC26, AT91_PIN_PC25, AT91_PIN_PC24
+};
+
+static const unsigned myboard_gpiomux_values[] = {
+ 0, 1, 2, 3
+};
+
+static struct gpio_i2cmux_platform_data myboard_i2cmux_data = {
+ .parent = 1,
+ .base_nr = 2, /* optional */
+ .values = myboard_gpiomux_values,
+ .n_values = ARRAY_SIZE(myboard_gpiomux_values),
+ .gpios = myboard_gpiomux_gpios,
+ .n_gpios = ARRAY_SIZE(myboard_gpiomux_gpios),
+ .idle = 4, /* optional */
+};
+
+static struct platform_device myboard_i2cmux = {
+ .name = "i2c-gpio-mux",
+ .id = 0,
+ .dev = {
+ .platform_data = &myboard_i2cmux_data,
+ },
+};