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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-07-14 21:20:38 -0700 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-07-17 16:14:07 +0200 |
| commit | 522f045595dd2e65cb8fa4c8ce60f2b1e565804f (patch) | |
| tree | 2f33df9c97722a9490a14f12cafdf294c790746f /Documentation/devicetree/bindings/i2c | |
| parent | 90a09178f309c95bf486dff9a54637fd3336e0aa (diff) | |
| download | lwn-522f045595dd2e65cb8fa4c8ce60f2b1e565804f.tar.gz lwn-522f045595dd2e65cb8fa4c8ce60f2b1e565804f.zip | |
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
This patch documents missing clocks and power-domains of Tegra210 VI I2C.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c')
| -rw-r--r-- | Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt index 18c0de362451..3f2f990c2e62 100644 --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt @@ -35,12 +35,12 @@ Required properties: Due to above changes, Tegra114 I2C driver makes incompatible with previous hardware driver. Hence, tegra114 I2C controller is compatible with "nvidia,tegra114-i2c". - nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is part of the - host1x domain and typically used for camera use-cases. This VI I2C - controller is mostly compatible with the programming model of the - regular I2C controllers with a few exceptions. The I2C registers start - at an offset of 0xc00 (instead of 0), registers are 16 bytes apart - (rather than 4) and the controller does not support slave mode. + nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus + and is part of VE power domain and typically used for camera use-cases. + This VI I2C controller is mostly compatible with the programming model + of the regular I2C controllers with a few exceptions. The I2C registers + start at an offset of 0xc00 (instead of 0), registers are 16 bytes + apart (rather than 4) and the controller does not support slave mode. - reg: Should contain I2C controller registers physical address and length. - interrupts: Should contain I2C controller interrupts. - address-cells: Address cells for I2C device address. @@ -53,10 +53,17 @@ Required properties: - fast-clk Tegra114: - div-clk + Tegra210: + - div-clk + - slow (only for nvidia,tegra210-i2c-vi compatible node) - resets: Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names: Must include the following entries: - i2c +- power-domains: Only for nvidia,tegra210-i2c-vi compatible node and must + include venc powergate node as vi i2c is part of VE power domain. + tegra210-i2c-vi: + - pd_venc - dmas: Must contain an entry for each entry in clock-names. See ../dma/dma.txt for details. - dma-names: Must include the following entries: |