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| author | Sibi Sankar <quic_sibis@quicinc.com> | 2022-05-23 12:30:56 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-06-29 21:48:32 -0500 |
| commit | 7f045132bc23904fa962d9e1574dca521b9d47ec (patch) | |
| tree | aa506c4e9eb186556bd968c4263114d097027114 /Documentation/devicetree/bindings/firmware | |
| parent | fe72f9bce137055fb744d4f8a91baa234ec07baa (diff) | |
| download | lwn-7f045132bc23904fa962d9e1574dca521b9d47ec.tar.gz lwn-7f045132bc23904fa962d9e1574dca521b9d47ec.zip | |
dt-bindings: firmware: qcom-scm: Add interconnects property
Add interconnects as an optional property for SM8450 SoCs.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1653289258-17699-2-git-send-email-quic_sibis@quicinc.com
Diffstat (limited to 'Documentation/devicetree/bindings/firmware')
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 231bc42e47f6..b3f702cbed87 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -46,6 +46,7 @@ Required properties: clock and "bus" for the bus clock per the requirements of the compatible. - qcom,dload-mode: phandle to the TCSR hardware block and offset of the download mode control register (optional) +- interconnects: Specifies the bandwidth requirements of the SCM interface (optional) Example for MSM8916: |