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| author | Gil Kupfer <gilkup@gmail.com> | 2018-05-10 17:56:02 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-05-10 17:56:02 -0500 |
| commit | cef74409ea79b0a37af6889e7abf7a2a9c47979b (patch) | |
| tree | 243ec22ccce2f44cf17e288ad0415691ad43f4e6 /Documentation/admin-guide/kernel-parameters.txt | |
| parent | f154a718e6cc0d834f5ac4dc4c3b174e65f3659e (diff) | |
| download | lwn-cef74409ea79b0a37af6889e7abf7a2a9c47979b.tar.gz lwn-cef74409ea79b0a37af6889e7abf7a2a9c47979b.zip | |
PCI: Add "pci=noats" boot parameter
Adds a "pci=noats" boot parameter. When supplied, all ATS related
functions fail immediately and the IOMMU is configured to not use
device-IOTLB.
Any function that checks for ATS capabilities directly against the devices
should also check this flag. Currently, such functions exist only in IOMMU
drivers, and they are covered by this patch.
The motivation behind this patch is the existence of malicious devices.
Lots of research has been done about how to use the IOMMU as protection
from such devices. When ATS is supported, any I/O device can access any
physical address by faking device-IOTLB entries. Adding the ability to
ignore these entries lets sysadmins enhance system security.
Signed-off-by: Gil Kupfer <gilkup@cs.technion.ac.il>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'Documentation/admin-guide/kernel-parameters.txt')
| -rw-r--r-- | Documentation/admin-guide/kernel-parameters.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 11fc28ecdb6d..a19ccac3b4c7 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3147,6 +3147,8 @@ on: Turn realloc on realloc same as realloc=on noari do not use PCIe ARI. + noats [PCIE, Intel-IOMMU, AMD-IOMMU] + do not use PCIe ATS (and IOMMU device IOTLB). pcie_scan_all Scan all possible PCIe devices. Otherwise we only look for one device below a PCIe downstream port. |