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authorVidya Sagar <vidyas@nvidia.com>2023-01-12 12:51:11 +0530
committerBjorn Helgaas <bhelgaas@google.com>2023-01-12 12:24:37 -0600
commitbba5065963f8ade14f3caa5b0f5b4a53d3054dfd (patch)
tree21b78bc540702786132b31287998dbd5c9e8b7e2 /Documentation/admin-guide/kernel-parameters.txt
parent1b929c02afd37871d5afb9d498426f83432e71c2 (diff)
downloadlwn-bba5065963f8ade14f3caa5b0f5b4a53d3054dfd.tar.gz
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PCI/AER: Configure ECRC only if AER is native
As the ECRC configuration bits are part of AER registers, configure ECRC only if AER is natively owned by the kernel. Link: https://lore.kernel.org/r/20230112072111.20063-1-vidyas@nvidia.com Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'Documentation/admin-guide/kernel-parameters.txt')
-rw-r--r--Documentation/admin-guide/kernel-parameters.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 6cfa6e3996cf..ecdb9530af8a 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -4296,7 +4296,9 @@
specified, e.g., 12@pci:8086:9c22:103c:198f
for 4096-byte alignment.
ecrc= Enable/disable PCIe ECRC (transaction layer
- end-to-end CRC checking).
+ end-to-end CRC checking). Only effective if
+ OS has native AER control (either granted by
+ ACPI _OSC or forced via "pcie_ports=native")
bios: Use BIOS/firmware settings. This is the
the default.
off: Turn ECRC off