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author | Michael Witten <mfwitten@gmail.com> | 2011-07-14 17:53:54 +0000 |
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committer | Michael Witten <mfwitten@gmail.com> | 2011-08-02 21:34:30 +0000 |
commit | 891f692533c36a17f00d25d24e4ac44ef38c9e5c (patch) | |
tree | bee5a52ef4586f5ea216c7fd5ba56abd991b5b13 /Documentation/PCI | |
parent | 55f9c40ff632d03c527d6a6ceddcda0a224587a6 (diff) | |
download | lwn-891f692533c36a17f00d25d24e4ac44ef38c9e5c.tar.gz lwn-891f692533c36a17f00d25d24e4ac44ef38c9e5c.zip |
Docs: MSI-HOWTO: Use the subjunctive, and change `can' to `may'
Signed-off-by: Michael Witten <mfwitten@gmail.com>
Acked-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Diffstat (limited to 'Documentation/PCI')
-rw-r--r-- | Documentation/PCI/MSI-HOWTO.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/PCI/MSI-HOWTO.txt b/Documentation/PCI/MSI-HOWTO.txt index 3f5e0b09bed5..43ffff1b5618 100644 --- a/Documentation/PCI/MSI-HOWTO.txt +++ b/Documentation/PCI/MSI-HOWTO.txt @@ -45,7 +45,7 @@ arrived in memory (this becomes more likely with devices behind PCI-PCI bridges). In order to ensure that all the data has arrived in memory, the interrupt handler must read a register on the device which raised the interrupt. PCI transaction ordering rules require that all the data -arrives in memory before the value can be returned from the register. +arrive in memory before the value may be returned from the register. Using MSIs avoids this problem as the interrupt-generating write cannot pass the data writes, so by the time the interrupt is raised, the driver knows that all the data has arrived in memory. |