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authorYazen Ghannam <yazen.ghannam@amd.com>2024-06-07 16:32:59 -0500
committerBorislav Petkov (AMD) <bp@alien8.de>2024-06-10 07:56:33 +0200
commitfe8a08973a0dea9757394c5adbdc3c0a03b0b432 (patch)
treecd0c81e804e42c4fd8971ef405444850d3022ae1
parent83a7eefedc9b56fe7bfeff13b6c7356688ffa670 (diff)
downloadlwn-fe8a08973a0dea9757394c5adbdc3c0a03b0b432.tar.gz
lwn-fe8a08973a0dea9757394c5adbdc3c0a03b0b432.zip
RAS/AMD/ATL: Fix MI300 bank hash
Apply the SID bits to the correct offset in the Bank value. Do this in the temporary value so they don't need to be masked off later. Fixes: 87a612375307 ("RAS/AMD/ATL: Add MI300 DRAM to normalized address translation support") Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: <stable@kernel.org> Link: https://lore.kernel.org/r/20240607-mi300-dram-xl-fix-v1-1-2f11547a178c@amd.com
-rw-r--r--drivers/ras/amd/atl/umc.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/ras/amd/atl/umc.c b/drivers/ras/amd/atl/umc.c
index 59b6169093f7..5cb92330dc67 100644
--- a/drivers/ras/amd/atl/umc.c
+++ b/drivers/ras/amd/atl/umc.c
@@ -189,16 +189,11 @@ static unsigned long convert_dram_to_norm_addr_mi300(unsigned long addr)
/* Calculate hash for PC bit. */
if (addr_hash.pc.xor_enable) {
- /* Bits SID[1:0] act as Bank[6:5] for PC hash, so apply them here. */
- bank |= sid << 5;
-
temp = bitwise_xor_bits(col & addr_hash.pc.col_xor);
temp ^= bitwise_xor_bits(row & addr_hash.pc.row_xor);
- temp ^= bitwise_xor_bits(bank & addr_hash.bank_xor);
+ /* Bits SID[1:0] act as Bank[5:4] for PC hash, so apply them here. */
+ temp ^= bitwise_xor_bits((bank | sid << NUM_BANK_BITS) & addr_hash.bank_xor);
pc ^= temp;
-
- /* Drop SID bits for the sake of debug printing later. */
- bank &= 0x1F;
}
/* Reconstruct the normalized address starting with NA[4:0] = 0 */