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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-10 22:25:23 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2021-03-07 20:56:17 +0100 |
| commit | fbe9c9bb2e929865500a0985735f81c0142accad (patch) | |
| tree | e6c3ac4367bb83ca62df5c63cfcc40b92e19c029 | |
| parent | 6503c568e97a52f8b7a3109718db438e52e59485 (diff) | |
| download | lwn-fbe9c9bb2e929865500a0985735f81c0142accad.tar.gz lwn-fbe9c9bb2e929865500a0985735f81c0142accad.zip | |
ARM: dts: exynos: correct PMIC interrupt trigger level on P4 Note family
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU. Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.
Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.
Fixes: f48b5050c301 ("ARM: dts: exynos: add Samsung's Exynos4412-based P4 Note boards")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-7-krzk@kernel.org
| -rw-r--r-- | arch/arm/boot/dts/exynos4412-p4note.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi index 5fe371543cbb..9e750890edb8 100644 --- a/arch/arm/boot/dts/exynos4412-p4note.dtsi +++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi @@ -322,7 +322,7 @@ max77686: pmic@9 { compatible = "maxim,max77686"; interrupt-parent = <&gpx0>; - interrupts = <7 IRQ_TYPE_NONE>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&max77686_irq>; pinctrl-names = "default"; reg = <0x09>; |