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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-07-24 14:24:04 +1000
committerJoel Stanley <joel@jms.id.au>2018-12-03 09:13:52 +1030
commitfad06e25b04b1090c21b2be4343cf7ee07f02ab5 (patch)
treee240cb8328552504015cd6ec57f186aa3f368657
parentd776dd52247c2b82e719403fab9a755cf22bd258 (diff)
downloadlwn-fad06e25b04b1090c21b2be4343cf7ee07f02ab5.tar.gz
lwn-fad06e25b04b1090c21b2be4343cf7ee07f02ab5.zip
ARM: dts: aspeed: Palmetto system can use coprocessor for FSI
This allows userspace to switch away from bitbanging to use kernel FSI with the coprocessor. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts28
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index c7084a819dc6..e6cfdf3c1a67 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -26,6 +26,11 @@
no-map;
reg = <0x5f000000 0x01000000>; /* 16M */
};
+
+ coldfire_memory: codefire_memory@5ee00000 {
+ reg = <0x5ee00000 0x00200000>;
+ no-map;
+ };
};
leds {
@@ -44,6 +49,22 @@
};
};
+ fsi: gpio-fsi {
+ compatible = "aspeed,ast2400-cf-fsi-master", "fsi-master";
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ memory-region = <&coldfire_memory>;
+ aspeed,sram = <&sram>;
+ aspeed,cvic = <&cvic>;
+
+ clock-gpios = <&gpio ASPEED_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
+ data-gpios = <&gpio ASPEED_GPIO(A, 5) GPIO_ACTIVE_HIGH>;
+ mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
+ trans-gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
@@ -303,13 +324,6 @@
line-name = "SYS_PWROK_BMC";
};
- pin_gpio_h6 {
- gpio-hog;
- gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "SCM1_FSI0_DATA_EN";
- };
-
pin_gpio_h7 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;