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authorTony Lindgren <tony@atomide.com>2012-10-29 14:46:30 -0700
committerTony Lindgren <tony@atomide.com>2012-10-31 10:14:14 -0700
commitf205cfaf6c1287aca040c51c1789b46ed63a4d78 (patch)
treecad69f53dd0f2ccc2cf2aa1d74dbb113076a39d8
parentd8cfd6c8b4f58b0c09811eefa4b9e022c75099f7 (diff)
downloadlwn-f205cfaf6c1287aca040c51c1789b46ed63a4d78.tar.gz
lwn-f205cfaf6c1287aca040c51c1789b46ed63a4d78.zip
ARM: OMAP: Move omap1 specific code to local sram.c
Let's make the omap1 specific parts private to mach-omap1. These should not be in the shared code. Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap1/Makefile3
-rw-r--r--arch/arm/mach-omap1/sram-init.c76
-rw-r--r--arch/arm/plat-omap/sram.c49
3 files changed, 81 insertions, 47 deletions
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c386161..f0e69cbc5baa 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
#
# Common support
-obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
+ serial.o devices.o dma.o
obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 000000000000..6431b0f862ce
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
+/*
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "sram.h"
+
+#define OMAP1_SRAM_PA 0x20000000
+#define SRAM_BOOTLOADER_SZ 0x80
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_and_map_sram(void)
+{
+ unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
+ unsigned long omap_sram_start = OMAP1_SRAM_PA;
+ unsigned long omap_sram_size;
+
+ if (cpu_is_omap7xx())
+ omap_sram_size = 0x32000; /* 200K */
+ else if (cpu_is_omap15xx())
+ omap_sram_size = 0x30000; /* 192K */
+ else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+ cpu_is_omap1621() || cpu_is_omap1710())
+ omap_sram_size = 0x4000; /* 16K */
+ else {
+ pr_err("Could not detect SRAM size\n");
+ omap_sram_size = 0x4000;
+ }
+
+ omap_map_sram(omap_sram_start, omap_sram_size,
+ omap_sram_skip, 1);
+}
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+ BUG_ON(!_omap_sram_reprogram_clock);
+ /* On 730, bit 13 must always be 1 */
+ if (cpu_is_omap7xx())
+ ckctl |= 0x2000;
+ _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap_sram_init(void)
+{
+ omap_detect_and_map_sram();
+ _omap_sram_reprogram_clock =
+ omap_sram_push(omap1_sram_reprogram_clock,
+ omap1_sram_reprogram_clock_sz);
+
+ return 0;
+}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index aa2644a1ca83..6fd32162964f 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,8 +26,6 @@
#include <asm/mach/map.h>
-#include "../mach-omap1/soc.h"
-#include "../mach-omap1/sram.h"
#include "../mach-omap2/soc.h"
#include "../mach-omap2/sram.h"
@@ -36,7 +34,6 @@
#include "../mach-omap2/prm2xxx_3xxx.h"
#include "../mach-omap2/sdrc.h"
-#define OMAP1_SRAM_PA 0x20000000
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
#ifdef CONFIG_OMAP4_ERRATA_I688
@@ -150,20 +147,6 @@ static void __init omap_detect_sram(void)
omap_sram_size = 0x10000; /* 64K */
}
}
- } else {
- omap_sram_start = OMAP1_SRAM_PA;
-
- if (cpu_is_omap7xx())
- omap_sram_size = 0x32000; /* 200K */
- else if (cpu_is_omap15xx())
- omap_sram_size = 0x30000; /* 192K */
- else if (cpu_is_omap1610() || cpu_is_omap1611() ||
- cpu_is_omap1621() || cpu_is_omap1710())
- omap_sram_size = 0x4000; /* 16K */
- else {
- pr_err("Could not detect SRAM size\n");
- omap_sram_size = 0x4000;
- }
}
}
@@ -257,32 +240,6 @@ void __init omap_map_sram(unsigned long start, unsigned long size,
omap_sram_size - omap_sram_skip);
}
-#ifdef CONFIG_ARCH_OMAP1
-
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
- BUG_ON(!_omap_sram_reprogram_clock);
- /* On 730, bit 13 must always be 1 */
- if (cpu_is_omap7xx())
- ckctl |= 0x2000;
- _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
-static int __init omap1_sram_init(void)
-{
- _omap_sram_reprogram_clock =
- omap_sram_push(omap1_sram_reprogram_clock,
- omap1_sram_reprogram_clock_sz);
-
- return 0;
-}
-
-#else
-#define omap1_sram_init() do {} while (0)
-#endif
-
#if defined(CONFIG_ARCH_OMAP2)
static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
@@ -407,14 +364,13 @@ static inline int am33xx_sram_init(void)
return 0;
}
+#ifdef CONFIG_ARCH_OMAP2PLUS
int __init omap_sram_init(void)
{
omap_detect_sram();
omap_fix_and_map_sram();
- if (!(cpu_class_is_omap2()))
- omap1_sram_init();
- else if (cpu_is_omap242x())
+ if (cpu_is_omap242x())
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
@@ -425,3 +381,4 @@ int __init omap_sram_init(void)
return 0;
}
+#endif