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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-10-24 12:23:06 +0200 |
|---|---|---|
| committer | Chen-Yu Tsai <wenst@chromium.org> | 2022-11-29 14:42:41 +0800 |
| commit | ecc639ddbe0d7bf1c66f6c69ee54ee005484d886 (patch) | |
| tree | 0d5c39666e163f837dd167af4651e8806d854520 | |
| parent | 327eeb6c240ab9293ab730789ea651fbc3fe6123 (diff) | |
| download | lwn-ecc639ddbe0d7bf1c66f6c69ee54ee005484d886.tar.gz lwn-ecc639ddbe0d7bf1c66f6c69ee54ee005484d886.zip | |
clk: mediatek: mt8186-mfg: Propagate rate changes to parent
Propagate the rate changes to MFG_BG3D's parent on MT8186 to allow
for proper GPU DVFS.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20221024102307.33722-10-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8186-mfg.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/mediatek/clk-mt8186-mfg.c b/drivers/clk/mediatek/clk-mt8186-mfg.c index f1f92216f894..0142d741053a 100644 --- a/drivers/clk/mediatek/clk-mt8186-mfg.c +++ b/drivers/clk/mediatek/clk-mt8186-mfg.c @@ -16,8 +16,9 @@ static const struct mtk_gate_regs mfg_cg_regs = { .sta_ofs = 0x0, }; -#define GATE_MFG(_id, _name, _parent, _shift) \ - GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr) +#define GATE_MFG(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \ + &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT) static const struct mtk_gate mfg_clks[] = { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0), |