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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-09-09 10:49:39 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-09-28 09:44:15 +0200 |
| commit | eb7d7b00d068bbf23c555a3589834753c3a1345b (patch) | |
| tree | c27b54bb17c29715fe1311f7556f1aec68088b23 | |
| parent | 9ec5b8fafb78c567c0b446891617a633e4994713 (diff) | |
| download | lwn-eb7d7b00d068bbf23c555a3589834753c3a1345b.tar.gz lwn-eb7d7b00d068bbf23c555a3589834753c3a1345b.zip | |
ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/ce8ae6b199fa244315a008ae31891a808ca1948d.1631174218.git.geert+renesas@glider.be
| -rw-r--r-- | arch/arm/boot/dts/iwg20d-q7-common.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 2 |
4 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index bc857676d191..849034a49a3f 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -158,6 +158,8 @@ status = "okay"; phy3: ethernet-phy@3 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; reg = <3>; micrel,led-mode = <1>; }; diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts index 94bf8a116b52..a5a79cdbcd0e 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts @@ -175,6 +175,8 @@ status = "okay"; phy3: ethernet-phy@3 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; reg = <3>; micrel,led-mode = <1>; }; diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 73bd62d8a929..c105932f642e 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -123,6 +123,8 @@ * On some older versions of the platform (before R4.0) the phy address * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. */ + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; reg = <3>; micrel,led-mode = <1>; }; diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 8ac61b50aec0..b024621c9981 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -79,6 +79,8 @@ status = "okay"; phy3: ethernet-phy@3 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; reg = <3>; interrupt-parent = <&gpio5>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |