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authorSascha Hauer <s.hauer@pengutronix.de>2022-09-26 10:16:43 +0200
committerHeiko Stuebner <heiko@sntech.de>2022-10-29 18:34:51 +0200
commitde4a4c8f64021b02aaa8ab21a82fe1f11a17b975 (patch)
treeb65d7b965377b670148675d6e3da40cd8be95ddf
parent4016379301a33e8bd0c2ef5c02f5d7f6a4afece4 (diff)
downloadlwn-de4a4c8f64021b02aaa8ab21a82fe1f11a17b975.tar.gz
lwn-de4a4c8f64021b02aaa8ab21a82fe1f11a17b975.zip
drm/rockchip: vop2: Register Esmart0-win0 as primary plane
Esmart0-win0 could serve as primary plane, so mark it as such. On RK3568 this window will never be used as primary plane, because the three windows at the beginning of the rk3568_vop_win_data[] array will be used. On RK3566 however, two of the windows at the beginning of the rk3568_vop_win_data[] array cannot not be used due to hardware limitations, so without this patch we end up with CRTCs without primary planes when multiple VPs are active. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220926081643.304759-1-s.hauer@pengutronix.de
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_vop2_reg.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 9bf0637bf8e2..9d30aa73b542 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -188,7 +188,7 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.base = 0x1800,
.layer_sel_id = 2,
.supported_rotations = DRM_MODE_REFLECT_Y,
- .type = DRM_PLANE_TYPE_OVERLAY,
+ .type = DRM_PLANE_TYPE_PRIMARY,
.max_upscale_factor = 8,
.max_downscale_factor = 8,
.dly = { 20, 47, 41 },