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| author | Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2014-12-18 15:04:21 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2014-12-22 20:17:23 +0000 |
| commit | c4827bb859cbe8afad9287c9dd4e7162119d3d59 (patch) | |
| tree | e9d27619523a8ae377362eaae0dcfd13bebc7cf1 | |
| parent | 7566bcc76b15186172c4db0414cf30c8a61e4a73 (diff) | |
| download | lwn-c4827bb859cbe8afad9287c9dd4e7162119d3d59.tar.gz lwn-c4827bb859cbe8afad9287c9dd4e7162119d3d59.zip | |
spi: pxa2xx: Add definition for Intel Quark DDS_RATE register
Intel Quark DDS_RATE register is defined only in register access macro. Add
a definition for it to common SSP register definitions for preparing to
cleanup those macros.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | include/linux/pxa2xx_ssp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h index 77aed9ea1d26..dab545bb66b3 100644 --- a/include/linux/pxa2xx_ssp.h +++ b/include/linux/pxa2xx_ssp.h @@ -37,6 +37,7 @@ #define SSDR (0x10) /* SSP Data Write/Data Read Register */ #define SSTO (0x28) /* SSP Time Out Register */ +#define DDS_RATE (0x28) /* SSP DDS Clock Rate Register (Intel Quark) */ #define SSPSP (0x2C) /* SSP Programmable Serial Protocol */ #define SSTSA (0x30) /* SSP Tx Timeslot Active */ #define SSRSA (0x34) /* SSP Rx Timeslot Active */ |