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| author | Peter Zijlstra <peterz@infradead.org> | 2020-09-02 15:25:52 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2020-09-04 15:12:52 +0200 |
| commit | c182487da1b5281463f2255d2347885dba219c08 (patch) | |
| tree | 25a5b976a85d8e43cc76f8bc223214b8ea73c197 | |
| parent | d5c678aed5eddb944b8e7ce451b107b39245962d (diff) | |
| download | lwn-c182487da1b5281463f2255d2347885dba219c08.tar.gz lwn-c182487da1b5281463f2255d2347885dba219c08.zip | |
x86/debug: Sync BTF earlier
Move the BTF sync near the DR6 load, as this will be the only common
code guaranteed to run on every #DB.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lore.kernel.org/r/20200902133200.786888252@infradead.org
| -rw-r--r-- | arch/x86/kernel/traps.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 81a2fb711091..99456428fb98 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -749,6 +749,13 @@ static __always_inline unsigned long debug_read_clear_dr6(void) /* Filter out all the reserved bits which are preset to 1 */ dr6 &= ~DR6_RESERVED; + /* + * The SDM says "The processor clears the BTF flag when it + * generates a debug exception." Clear TIF_BLOCKSTEP to keep + * TIF_BLOCKSTEP in sync with the hardware BTF flag. + */ + clear_thread_flag(TIF_BLOCKSTEP); + return dr6; } @@ -783,13 +790,6 @@ static void handle_debug(struct pt_regs *regs, unsigned long dr6, bool user) int si_code; /* - * The SDM says "The processor clears the BTF flag when it - * generates a debug exception." Clear TIF_BLOCKSTEP to keep - * TIF_BLOCKSTEP in sync with the hardware BTF flag. - */ - clear_thread_flag(TIF_BLOCKSTEP); - - /* * If DR6 is zero, no point in trying to handle it. The kernel is * not using INT1. */ |