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| author | Théo Lebrun <theo.lebrun@bootlin.com> | 2024-06-19 12:15:12 +0200 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-09-03 18:27:16 +0000 |
| commit | b8600b8791cb2b7c8be894846b1ecddba7291680 (patch) | |
| tree | 09c7d9086124dce4bd8ba8833465a897d5e81d8f | |
| parent | 7d7ce746a9e109ab0aa30ad3c6107e601cf17045 (diff) | |
| download | lwn-b8600b8791cb2b7c8be894846b1ecddba7291680.tar.gz lwn-b8600b8791cb2b7c8be894846b1ecddba7291680.zip | |
PCI: j721e: Add reset GPIO to struct j721e_pcie
Add reset GPIO to struct j721e_pcie, so it can be used at suspend and
resume stages.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-4-a2f9156da6c3@bootlin.com
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
| -rw-r--r-- | drivers/pci/controller/cadence/pci-j721e.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 46d47285ce74..c7f40920e061 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -53,6 +53,7 @@ struct j721e_pcie { u32 mode; u32 num_lanes; u32 max_lanes; + struct gpio_desc *reset_gpio; void __iomem *user_cfg_base; void __iomem *intd_cfg_base; u32 linkdown_irq_regfield; @@ -545,6 +546,7 @@ static int j721e_pcie_probe(struct platform_device *pdev) ret = dev_err_probe(dev, PTR_ERR(gpiod), "Failed to get reset GPIO\n"); goto err_get_sync; } + pcie->reset_gpio = gpiod; ret = cdns_pcie_init_phy(dev, cdns_pcie); if (ret) { |