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| author | Matt Roper <matthew.d.roper@intel.com> | 2019-06-05 14:18:32 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2019-06-05 15:12:37 -0700 |
| commit | b7143860634387a6bc2ca537a79caf9522e4f1a8 (patch) | |
| tree | ac9bcd8d6d850112474d5e9043a869e96d1a9cc9 | |
| parent | 2c1c55252647abd989b94f725b190c700312d053 (diff) | |
| download | lwn-b7143860634387a6bc2ca537a79caf9522e4f1a8.tar.gz lwn-b7143860634387a6bc2ca537a79caf9522e4f1a8.zip | |
drm/i915/ehl: Support HBR3 on EHL combo PHY
Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that
this just extends the upper limit; we will continue to honor the max
data rate specified in the VBT in cases where it is lower than HBR3.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190605211832.23945-1-matthew.d.roper@intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 24b56b2a76c8..b099a9dc28fd 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) enum port port = dig_port->base.port; if (intel_port_is_combophy(dev_priv, port) && + !IS_ELKHARTLAKE(dev_priv) && !intel_dp_is_edp(intel_dp)) return 540000; |