diff options
author | YT Shen <yt.shen@mediatek.com> | 2018-12-03 19:36:01 +0800 |
---|---|---|
committer | Matthias Brugger <matthias.bgg@gmail.com> | 2019-01-09 18:16:07 +0100 |
commit | a9386c5366a7657fbddec91e0ed04c54b24e145d (patch) | |
tree | 10706f2af3a9a4c366985f2ff155df18f3282fc4 | |
parent | db0b58d88d7d1af5ce3e454e397eb461565675c5 (diff) | |
download | lwn-a9386c5366a7657fbddec91e0ed04c54b24e145d.tar.gz lwn-a9386c5366a7657fbddec91e0ed04c54b24e145d.zip |
arm64: dts: add nand nodes for MT2712
Signed-off-by: YT Shen <yt.shen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 4f0aa65f1625..e8afb5431fcb 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -504,6 +504,27 @@ status = "disabled"; }; + nandc: nfi@1100e000 { + compatible = "mediatek,mt2712-nfc"; + reg = <0 0x1100e000 0 0x1000>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_NFI2X_EN>, <&pericfg CLK_PERI_NFI>; + clock-names = "nfi_clk", "pad_clk"; + ecc-engine = <&bch>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bch: ecc@1100f000 { + compatible = "mediatek,mt2712-ecc"; + reg = <0 0x1100f000 0 0x1000>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_NFI1X_CK_EN>; + clock-names = "nfiecc_clk"; + status = "disabled"; + }; + i2c3: i2c@11010000 { compatible = "mediatek,mt2712-i2c"; reg = <0 0x11010000 0 0x90>, |