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| author | Paul Mackerras <paulus@samba.org> | 2013-09-05 16:01:16 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-09-05 17:29:20 +1000 |
| commit | 9f24b0c9ef9b6b1292579c9e2cd7ff07ddc372b7 (patch) | |
| tree | 224bb740a116f403bdfa3882e88224c35ea12011 | |
| parent | fd3bb91287b600d8b389c159e8dd96391410087b (diff) | |
| download | lwn-9f24b0c9ef9b6b1292579c9e2cd7ff07ddc372b7.tar.gz lwn-9f24b0c9ef9b6b1292579c9e2cd7ff07ddc372b7.zip | |
powerpc: Correct FSCR bit definitions
Commit 74e400cee6 ("powerpc: Rework setting up H/FSCR bit definitions")
ended up with incorrect bit numbers for FSCR_PM_LG and FSCR_BHRB_LG.
This fixes them.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index dc10bf549635..10d1ef016bf1 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -258,8 +258,8 @@ #define FSCR_TAR_LG 8 /* Enable Target Address Register */ #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ #define FSCR_TM_LG 5 /* Enable Transactional Memory */ -#define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */ -#define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/ +#define FSCR_BHRB_LG 4 /* Enable Branch History Rolling Buffer*/ +#define FSCR_PM_LG 3 /* Enable prob/priv access to PMU SPRs */ #define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */ #define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ #define FSCR_FP_LG 0 /* Enable Floating Point */ |