diff options
| author | Grygorii Strashko <grygorii.strashko@ti.com> | 2023-05-08 12:33:59 +0530 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2023-05-09 11:57:53 +0200 |
| commit | 94e86ef1b801d213dfb8543633dec86abb1a457d (patch) | |
| tree | f8226f4b0a0e3564ea43b7d9e49db37cefc750ff | |
| parent | ed23734c23d2fc1e6a1ff80f8c2b82faeed0ed0c (diff) | |
| download | lwn-94e86ef1b801d213dfb8543633dec86abb1a457d.tar.gz lwn-94e86ef1b801d213dfb8543633dec86abb1a457d.zip | |
net: phy: dp83869: support mii mode when rgmii strap cfg is used
The DP83869 PHY on TI's k3-am642-evm supports both MII and RGMII
interfaces and is configured by default to use RGMII interface (strap).
However, the board design allows switching dynamically to MII interface
for testing purposes by applying different set of pinmuxes.
To support switching to MII interface, update the DP83869 PHY driver to
configure OP_MODE_DECODE.RGMII_MII_SEL(bit 5) properly when MII PHY
interface mode is requested.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20230508070359.357474-1-s-vadapalli@ti.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
| -rw-r--r-- | drivers/net/phy/dp83869.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c index 9ab5eff502b7..fa8c6fdcf301 100644 --- a/drivers/net/phy/dp83869.c +++ b/drivers/net/phy/dp83869.c @@ -692,8 +692,19 @@ static int dp83869_configure_mode(struct phy_device *phydev, /* Below init sequence for each operational mode is defined in * section 9.4.8 of the datasheet. */ + phy_ctrl_val = dp83869->mode; + if (phydev->interface == PHY_INTERFACE_MODE_MII) { + if (dp83869->mode == DP83869_100M_MEDIA_CONVERT || + dp83869->mode == DP83869_RGMII_100_BASE) { + phy_ctrl_val |= DP83869_OP_MODE_MII; + } else { + phydev_err(phydev, "selected op-mode is not valid with MII mode\n"); + return -EINVAL; + } + } + ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, - dp83869->mode); + phy_ctrl_val); if (ret) return ret; |