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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-09-09 11:20:23 +0200 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2022-09-13 17:01:18 -0500 |
commit | 90cb380f9ceb811059340d06ff5fd0c0e93ecbe1 (patch) | |
tree | f3418fe56aea6d294fdcd48ff4879f5db97a5a25 | |
parent | 276a4f1a5fb118bfd6980d42732d530e43f2916a (diff) | |
download | lwn-90cb380f9ceb811059340d06ff5fd0c0e93ecbe1.tar.gz lwn-90cb380f9ceb811059340d06ff5fd0c0e93ecbe1.zip |
hwspinlock: qcom: correct MMIO max register for newer SoCs
Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum
register 0x20000 (32 mutexes * 0x1000).
Fixes: 7a1e6fb1c606 ("hwspinlock: qcom: Allow mmio usage in addition to syscon")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-4-krzysztof.kozlowski@linaro.org
-rw-r--r-- | drivers/hwspinlock/qcom_hwspinlock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index 80ea45b3a815..9734e149d981 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -121,7 +121,7 @@ static const struct regmap_config tcsr_mutex_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, - .max_register = 0x40000, + .max_register = 0x20000, .fast_io = true, }; |