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authorRajmohan Mani <rajmohan.mani@intel.com>2015-11-18 10:48:20 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-12-09 14:03:28 -0500
commit84390caa6331908d76aa63b8eda0e69f557dda06 (patch)
tree38ffe1b6904dc3de3005664b4b4910e6db1c3df4
parentff4fcbdf43bc4ae760ef1e7782e233156ed90a75 (diff)
downloadlwn-84390caa6331908d76aa63b8eda0e69f557dda06.tar.gz
lwn-84390caa6331908d76aa63b8eda0e69f557dda06.zip
xhci: Workaround to get Intel xHCI reset working more reliably
commit a5964396190d0c40dd549c23848c282fffa5d1f2 upstream. Existing Intel xHCI controllers require a delay of 1 mS, after setting the CMD_RESET bit in command register, before accessing any HC registers. This allows the HC to complete the reset operation and be ready for HC register access. Without this delay, the subsequent HC register access, may result in a system hang, very rarely. Verified CherryView / Braswell platforms go through over 5000 warm reboot cycles (which was not possible without this patch), without any xHCI reset hang. Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Tested-by: Joe Lawrence <joe.lawrence@stratus.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/usb/host/xhci.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 26f62b2b33f8..1e6d7579709e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -175,6 +175,16 @@ int xhci_reset(struct xhci_hcd *xhci)
command |= CMD_RESET;
writel(command, &xhci->op_regs->command);
+ /* Existing Intel xHCI controllers require a delay of 1 mS,
+ * after setting the CMD_RESET bit, and before accessing any
+ * HC registers. This allows the HC to complete the
+ * reset operation and be ready for HC register access.
+ * Without this delay, the subsequent HC register access,
+ * may result in a system hang very rarely.
+ */
+ if (xhci->quirks & XHCI_INTEL_HOST)
+ udelay(1000);
+
ret = xhci_handshake(&xhci->op_regs->command,
CMD_RESET, 0, 10 * 1000 * 1000);
if (ret)