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authorAntonio Borneo <antonio.borneo@foss.st.com>2024-04-15 15:49:26 +0200
committerThomas Gleixner <tglx@linutronix.de>2024-04-23 00:28:16 +0200
commit7da4ba315e3980ca3e87d40a10908f716f026d2c (patch)
tree850c0911a3005da45ba3144b83c69a6742c61227
parentfbc3facb0b5c607eb80974e33cd155556075cca4 (diff)
downloadlwn-7da4ba315e3980ca3e87d40a10908f716f026d2c.tar.gz
lwn-7da4ba315e3980ca3e87d40a10908f716f026d2c.zip
arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251
Add exti1 as interrupt parent for the two pin controllers. Add the additional required property st,syscfg. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240415134926.1254428-12-antonio.borneo@foss.st.com
-rw-r--r--arch/arm64/boot/dts/st/stm32mp251.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 1426446ca1b1..e7d1614dc744 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -271,6 +271,8 @@
#size-cells = <1>;
compatible = "st,stm32mp257-pinctrl";
ranges = <0 0x44240000 0xa0400>;
+ interrupt-parent = <&exti1>;
+ st,syscfg = <&exti1 0x60 0xff>;
pins-are-numbered;
gpioa: gpio@44240000 {
@@ -400,6 +402,8 @@
#size-cells = <1>;
compatible = "st,stm32mp257-z-pinctrl";
ranges = <0 0x46200000 0x400>;
+ interrupt-parent = <&exti1>;
+ st,syscfg = <&exti1 0x60 0xff>;
pins-are-numbered;
gpioz: gpio@46200000 {