diff options
| author | Bart Van Assche <bvanassche@acm.org> | 2022-04-19 15:57:56 -0700 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2022-04-25 23:23:02 -0400 |
| commit | 778d2b0ec6d11642f42ad55b0415988a85255f6c (patch) | |
| tree | 8839fff9cf97ccc32f2b89e101530f28bca7c17c | |
| parent | 9474c64e83ca5561a7c5b410395ec6c24616d3b4 (diff) | |
| download | lwn-778d2b0ec6d11642f42ad55b0415988a85255f6c.tar.gz lwn-778d2b0ec6d11642f42ad55b0415988a85255f6c.zip | |
scsi: ufs: Switch to aggregate initialization
Make it easier to verify for humans that ufshcd_init_pwr_dev_param()
initializes all structure members. This patch does not change any
functionality.
Link: https://lore.kernel.org/r/20220419225811.4127248-14-bvanassche@acm.org
Tested-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| -rw-r--r-- | drivers/scsi/ufs/ufshcd-pltfrm.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c index cca4b2181a81..9923cbc70653 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -297,18 +297,20 @@ EXPORT_SYMBOL_GPL(ufshcd_get_pwr_dev_param); void ufshcd_init_pwr_dev_param(struct ufs_dev_params *dev_param) { - dev_param->tx_lanes = 2; - dev_param->rx_lanes = 2; - dev_param->hs_rx_gear = UFS_HS_G3; - dev_param->hs_tx_gear = UFS_HS_G3; - dev_param->pwm_rx_gear = UFS_PWM_G4; - dev_param->pwm_tx_gear = UFS_PWM_G4; - dev_param->rx_pwr_pwm = SLOW_MODE; - dev_param->tx_pwr_pwm = SLOW_MODE; - dev_param->rx_pwr_hs = FAST_MODE; - dev_param->tx_pwr_hs = FAST_MODE; - dev_param->hs_rate = PA_HS_MODE_B; - dev_param->desired_working_mode = UFS_HS_MODE; + *dev_param = (struct ufs_dev_params){ + .tx_lanes = 2, + .rx_lanes = 2, + .hs_rx_gear = UFS_HS_G3, + .hs_tx_gear = UFS_HS_G3, + .pwm_rx_gear = UFS_PWM_G4, + .pwm_tx_gear = UFS_PWM_G4, + .rx_pwr_pwm = SLOW_MODE, + .tx_pwr_pwm = SLOW_MODE, + .rx_pwr_hs = FAST_MODE, + .tx_pwr_hs = FAST_MODE, + .hs_rate = PA_HS_MODE_B, + .desired_working_mode = UFS_HS_MODE, + }; } EXPORT_SYMBOL_GPL(ufshcd_init_pwr_dev_param); |