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| author | Konrad Dybcio <konrad.dybcio@somainline.org> | 2023-06-14 13:35:34 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-07-09 21:26:39 -0700 |
| commit | 75a511b1e5ff6ffadb9b51d85beee8c7bcc29ba9 (patch) | |
| tree | faa91bf90a9fc18e361634fd05ce468572ff63ec | |
| parent | 3091e5820a367f3368132f57e0a9ba6d545da15d (diff) | |
| download | lwn-75a511b1e5ff6ffadb9b51d85beee8c7bcc29ba9.tar.gz lwn-75a511b1e5ff6ffadb9b51d85beee8c7bcc29ba9.zip | |
arm64: dts: qcom: sm6350: Add GPUCC node
Add and configure a node for the GPU clock controller.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-3-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6350.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 30e77010aed5..fd35810bcfb5 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -5,6 +5,7 @@ */ #include <dt-bindings/clock/qcom,gcc-sm6350.h> +#include <dt-bindings/clock/qcom,gpucc-sm6350.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,sm6350-camcc.h> #include <dt-bindings/dma/qcom-gpi.h> @@ -1308,6 +1309,20 @@ }; }; + gpucc: clock-controller@3d90000 { + compatible = "qcom,sm6350-gpucc"; + reg = <0 0x03d90000 0 0x9000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_GPU_GPLL0_CLK>, + <&gcc GCC_GPU_GPLL0_DIV_CLK>; + clock-names = "bi_tcxo", + "gcc_gpu_gpll0_clk_src", + "gcc_gpu_gpll0_div_clk_src"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mpss: remoteproc@4080000 { compatible = "qcom,sm6350-mpss-pas"; reg = <0x0 0x04080000 0x0 0x4040>; |