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authorKan Liang <kan.liang@linux.intel.com>2021-10-06 13:12:17 -0700
committerPeter Zijlstra <peterz@infradead.org>2021-10-15 11:25:26 +0200
commit71920ea97d6d1d800ee8b51951dc3fda3f5dc698 (patch)
treeb85e5da4cbb00818a7013181fa2354f81ed91220
parent64570fbc14f8d7cb3fe3995f20e26bc25ce4b2cc (diff)
downloadlwn-71920ea97d6d1d800ee8b51951dc3fda3f5dc698.tar.gz
lwn-71920ea97d6d1d800ee8b51951dc3fda3f5dc698.zip
perf/x86/msr: Add Sapphire Rapids CPU support
SMI_COUNT MSR is supported on Sapphire Rapids CPU. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/1633551137-192083-1-git-send-email-kan.liang@linux.intel.com
-rw-r--r--arch/x86/events/msr.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index c853b28efa33..96c775abe31f 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -68,6 +68,7 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_BROADWELL_D:
case INTEL_FAM6_BROADWELL_G:
case INTEL_FAM6_BROADWELL_X:
+ case INTEL_FAM6_SAPPHIRERAPIDS_X:
case INTEL_FAM6_ATOM_SILVERMONT:
case INTEL_FAM6_ATOM_SILVERMONT_D: