diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-03-10 01:35:44 +0800 |
---|---|---|
committer | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-03-10 04:38:58 +0800 |
commit | 6d848200e90f273a5bcdf9b0e6f2e312bbad8266 (patch) | |
tree | deead0cc713eafd2089c40b3f6a2dd5d8f0c45a2 | |
parent | 605b0999f333b2e5a6361207173725b2bfa2df52 (diff) | |
download | lwn-6d848200e90f273a5bcdf9b0e6f2e312bbad8266.tar.gz lwn-6d848200e90f273a5bcdf9b0e6f2e312bbad8266.zip |
RT: MIPS: Un-thread i8259A cascade interrupt
This patch un-threads the i8259A cascade interrupts, and convert the
related lock to raw_spinlock_t type.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
-rw-r--r-- | arch/mips/include/asm/i8259.h | 6 | ||||
-rw-r--r-- | arch/mips/kernel/i8259.c | 23 | ||||
-rw-r--r-- | arch/mips/loongson/lemote-2f/irq.c | 4 |
3 files changed, 17 insertions, 16 deletions
diff --git a/arch/mips/include/asm/i8259.h b/arch/mips/include/asm/i8259.h index 8572a2d90484..c7e278447c0a 100644 --- a/arch/mips/include/asm/i8259.h +++ b/arch/mips/include/asm/i8259.h @@ -35,7 +35,7 @@ #define SLAVE_ICW4_DEFAULT 0x01 #define PIC_ICW4_AEOI 2 -extern spinlock_t i8259A_lock; +extern raw_spinlock_t i8259A_lock; extern int i8259A_irq_pending(unsigned int irq); extern void make_8259A_irq(unsigned int irq); @@ -51,7 +51,7 @@ static inline int i8259_irq(void) { int irq; - spin_lock(&i8259A_lock); + raw_spin_lock(&i8259A_lock); /* Perform an interrupt acknowledge cycle on controller 1. */ outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */ @@ -78,7 +78,7 @@ static inline int i8259_irq(void) irq = -1; } - spin_unlock(&i8259A_lock); + raw_spin_unlock(&i8259A_lock); return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq; } diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 01c0885a8061..811564cf1332 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -29,7 +29,7 @@ */ static int i8259A_auto_eoi = -1; -DEFINE_SPINLOCK(i8259A_lock); +DEFINE_RAW_SPINLOCK(i8259A_lock); static void disable_8259A_irq(unsigned int irq); static void enable_8259A_irq(unsigned int irq); static void mask_and_ack_8259A(unsigned int irq); @@ -65,13 +65,13 @@ static void disable_8259A_irq(unsigned int irq) irq -= I8259A_IRQ_BASE; mask = 1 << irq; - spin_lock_irqsave(&i8259A_lock, flags); + raw_spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask |= mask; if (irq & 8) outb(cached_slave_mask, PIC_SLAVE_IMR); else outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); + raw_spin_unlock_irqrestore(&i8259A_lock, flags); } static void enable_8259A_irq(unsigned int irq) @@ -81,13 +81,13 @@ static void enable_8259A_irq(unsigned int irq) irq -= I8259A_IRQ_BASE; mask = ~(1 << irq); - spin_lock_irqsave(&i8259A_lock, flags); + raw_spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask &= mask; if (irq & 8) outb(cached_slave_mask, PIC_SLAVE_IMR); else outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); + raw_spin_unlock_irqrestore(&i8259A_lock, flags); } int i8259A_irq_pending(unsigned int irq) @@ -98,12 +98,12 @@ int i8259A_irq_pending(unsigned int irq) irq -= I8259A_IRQ_BASE; mask = 1 << irq; - spin_lock_irqsave(&i8259A_lock, flags); + raw_spin_lock_irqsave(&i8259A_lock, flags); if (irq < 8) ret = inb(PIC_MASTER_CMD) & mask; else ret = inb(PIC_SLAVE_CMD) & (mask >> 8); - spin_unlock_irqrestore(&i8259A_lock, flags); + raw_spin_unlock_irqrestore(&i8259A_lock, flags); return ret; } @@ -151,7 +151,7 @@ static void mask_and_ack_8259A(unsigned int irq) irq -= I8259A_IRQ_BASE; irqmask = 1 << irq; - spin_lock_irqsave(&i8259A_lock, flags); + raw_spin_lock_irqsave(&i8259A_lock, flags); /* * Lightweight spurious IRQ detection. We do not want * to overdo spurious IRQ handling - it's usually a sign @@ -183,7 +183,7 @@ handle_real_irq: outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ } smtc_im_ack_irq(irq); - spin_unlock_irqrestore(&i8259A_lock, flags); + raw_spin_unlock_irqrestore(&i8259A_lock, flags); return; spurious_8259A_irq: @@ -264,7 +264,7 @@ static void init_8259A(int auto_eoi) i8259A_auto_eoi = auto_eoi; - spin_lock_irqsave(&i8259A_lock, flags); + raw_spin_lock_irqsave(&i8259A_lock, flags); outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ @@ -298,7 +298,7 @@ static void init_8259A(int auto_eoi) outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ - spin_unlock_irqrestore(&i8259A_lock, flags); + raw_spin_unlock_irqrestore(&i8259A_lock, flags); } /* @@ -306,6 +306,7 @@ static void init_8259A(int auto_eoi) */ static struct irqaction irq2 = { .handler = no_action, + .flags = IRQF_NODELAY, .name = "cascade", }; diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c index 77d32f9cf31e..882dfcd42c00 100644 --- a/arch/mips/loongson/lemote-2f/irq.c +++ b/arch/mips/loongson/lemote-2f/irq.c @@ -38,7 +38,7 @@ int mach_i8259_irq(void) irq = -1; if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) { - spin_lock(&i8259A_lock); + raw_spin_lock(&i8259A_lock); isr = inb(PIC_MASTER_CMD) & ~inb(PIC_MASTER_IMR) & ~(1 << PIC_CASCADE_IR); if (!isr) @@ -56,7 +56,7 @@ int mach_i8259_irq(void) if (~inb(PIC_MASTER_ISR) & 0x80) irq = -1; } - spin_unlock(&i8259A_lock); + raw_spin_unlock(&i8259A_lock); } return irq; |