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author | Paul Cercueil <paul@crapouillou.net> | 2020-09-06 21:29:23 +0200 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-18 16:27:00 +0200 |
commit | 5ef415107dfd42a334d62a9b7be9754817df92ed (patch) | |
tree | 8721bedce8f68009a6e1d4449c869b3804ee47f8 | |
parent | 95b1f6db67aea9135b018497f7ed4446a060cba2 (diff) | |
download | lwn-5ef415107dfd42a334d62a9b7be9754817df92ed.tar.gz lwn-5ef415107dfd42a334d62a9b7be9754817df92ed.zip |
MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the <cpu-features-override.h> header.
Add that information to cpu_probe_ingenic().
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index a18f3611fa5e..a07e66a6e063 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -2125,6 +2125,9 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) c->options &= ~MIPS_CPU_COUNTER; BUG_ON(!__builtin_constant_p(cpu_has_counter) || cpu_has_counter); + /* XBurst has virtually tagged icache */ + c->icache.flags |= MIPS_CACHE_VTAG; + switch (c->processor_id & PRID_IMP_MASK) { /* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */ |