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| author | Gustavo Sousa <gustavo.sousa@intel.com> | 2023-06-09 11:38:15 -0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:35:20 -0500 |
| commit | 5eeb8b443875f2a6f751ed2c77cc410fad6b2e61 (patch) | |
| tree | 2741967c396f601d6991e0a7076d1272de5bd374 | |
| parent | 1011812c642c664b254986fb34264c2ee8d2bb50 (diff) | |
| download | lwn-5eeb8b443875f2a6f751ed2c77cc410fad6b2e61.tar.gz lwn-5eeb8b443875f2a6f751ed2c77cc410fad6b2e61.zip | |
drm/xe/reg_sr: Apply limit to register whitelisting
If RING_MAX_NONPRIV_SLOTS denotes the maximum number of whitelisting
slots, then it makes sense to refuse going above it.
v2:
- Use xe_gt_err() instead of drm_err() for more detailed info in the
error message. (Matt)
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230609143815.302540-3-gustavo.sousa@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
| -rw-r--r-- | drivers/gpu/drm/xe/xe_reg_sr.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c index 65e6ad1906c6..7c88352636d2 100644 --- a/drivers/gpu/drm/xe/xe_reg_sr.c +++ b/drivers/gpu/drm/xe/xe_reg_sr.c @@ -235,6 +235,13 @@ void xe_reg_sr_apply_whitelist(struct xe_hw_engine *hwe) p = drm_debug_printer(KBUILD_MODNAME); xa_for_each(&sr->xa, reg, entry) { + if (slot == RING_MAX_NONPRIV_SLOTS) { + xe_gt_err(gt, + "hwe %s: maximum register whitelist slots (%d) reached, refusing to add more\n", + hwe->name, RING_MAX_NONPRIV_SLOTS); + break; + } + xe_reg_whitelist_print_entry(&p, 0, reg, entry); xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), reg | entry->set_bits); |