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author | Mans Rullgard <mans@mansr.com> | 2015-10-02 17:50:31 +0100 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-22 14:43:27 -0700 |
commit | 5e2b2e1c44da4a44931466eb0a47b097840be43a (patch) | |
tree | 088d482bcf6a12bde42163e168ec179ef8597253 | |
parent | 9f98531e220596953ce62c5df084bf073d88f901 (diff) | |
download | lwn-5e2b2e1c44da4a44931466eb0a47b097840be43a.tar.gz lwn-5e2b2e1c44da4a44931466eb0a47b097840be43a.zip |
serial: 8250: add uart_config entry for PORT_RT2880
commit 3c5a0357fdb3a9116a48dbdb0abb91fd23fbff80 upstream.
This adds an entry to the uart_config table for PORT_RT2880
enabling rx/tx FIFOs. The UART is actually a Palmchip BK-3103
which is found in several devices from Alchemy/RMI, Ralink, and
Sigma Designs.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/tty/serial/8250/8250_core.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index 4506e405c8f3..b4fd8debf941 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -339,6 +339,14 @@ configured less than Maximum supported fifo bytes */ UART_FCR7_64BYTE, .flags = UART_CAP_FIFO, }, + [PORT_RT2880] = { + .name = "Palmchip BK-3103", + .fifo_size = 16, + .tx_loadsz = 16, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .rxtrig_bytes = {1, 4, 8, 14}, + .flags = UART_CAP_FIFO, + }, }; /* Uart divisor latch read */ |