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authorArnd Bergmann <arnd@arndb.de>2014-03-26 23:07:17 +0100
committerArnd Bergmann <arnd@arndb.de>2014-03-26 23:07:17 +0100
commit53ad835ce7050dc3a3b3343fb07636db86783e26 (patch)
tree26d42c4b8ab4c1548906112d1ad3ffddf5f1042b
parente1a4018f939e9ff51712183c1fdc6775e5f181a1 (diff)
downloadlwn-53ad835ce7050dc3a3b3343fb07636db86783e26.tar.gz
lwn-53ad835ce7050dc3a3b3343fb07636db86783e26.zip
Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation"
This reverts commit bfdad565ae0a61ac943974b8ae61ec0ed55ceb04. The patch turned out to be incorrect, and will be replaced with a correct patch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c9
-rw-r--r--arch/arm/mach-ixp4xx/common.c12
2 files changed, 9 insertions, 12 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 055d81694a17..200970d56f6d 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -481,5 +481,14 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
return 1;
}
+int dma_set_coherent_mask(struct device *dev, u64 mask)
+{
+ if (mask >= SZ_64M - 1)
+ return 0;
+
+ return -EIO;
+}
+
EXPORT_SYMBOL(ixp4xx_pci_read);
EXPORT_SYMBOL(ixp4xx_pci_write);
+EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index df82a2b4a546..6d68aed6548a 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -31,7 +31,6 @@
#include <linux/gpio.h>
#include <linux/cpu.h>
#include <linux/sched_clock.h>
-#include <linux/pci.h>
#include <mach/udc.h>
#include <mach/hardware.h>
@@ -579,17 +578,6 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd)
}
}
-int dma_set_coherent_mask(struct device *dev, u64 mask)
-{
- if (dev_is_pci(dev) && mask >= SZ_64M)
- return -EIO;
-
- dev->coherent_dma_mask = mask;
-
- return 0;
-}
-EXPORT_SYMBOL(dma_set_coherent_mask);
-
#ifdef CONFIG_IXP4XX_INDIRECT_PCI
/*
* In the case of using indirect PCI, we simply return the actual PCI