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| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-07-17 10:38:32 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-09-29 19:25:57 +0200 |
| commit | 5242720923a0a6d3a59b62e51c053f0948b9d2a3 (patch) | |
| tree | e37ad34c8310db5626bbeb98aed45509e8c1f08a | |
| parent | 2297868856a2208eed7598446edfcc71ffb717a1 (diff) | |
| download | lwn-5242720923a0a6d3a59b62e51c053f0948b9d2a3.tar.gz lwn-5242720923a0a6d3a59b62e51c053f0948b9d2a3.zip | |
MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions
commit c909ca718e8f50cf484ef06a8dd935e738e8e53d upstream.
Commit c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
added support for emulating the new R6 BC1{EQ,NE}Z branches but it missed
the case where the instruction that caused the exception was not on a DS.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10738/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/mips/math-emu/cp1emu.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 7a47b359622e..2b95e34fa9e8 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1181,6 +1181,24 @@ emul: } break; + case bc1eqz_op: + case bc1nez_op: + if (!cpu_has_mips_r6 || delay_slot(xcp)) + return SIGILL; + + cond = likely = 0; + switch (MIPSInst_RS(ir)) { + case bc1eqz_op: + if (get_fpr32(¤t->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1) + cond = 1; + break; + case bc1nez_op: + if (!(get_fpr32(¤t->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1)) + cond = 1; + break; + } + goto branch_common; + case bc_op: if (delay_slot(xcp)) return SIGILL; @@ -1207,7 +1225,7 @@ emul: case bct_op: break; } - +branch_common: set_delay_slot(xcp); if (cond) { /* |