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authorRengarajan S <rengarajan.s@microchip.com>2024-05-29 19:32:55 +0530
committerJakub Kicinski <kuba@kernel.org>2024-06-01 16:24:34 -0700
commit5160b129f65fc6e1a4aa282d44f824e12aa800ee (patch)
treed0e52dfc874aae71ecff2700ade645413dd4165c
parente58b43f28d8a55219f7a03af91f404f2d709364d (diff)
downloadlwn-5160b129f65fc6e1a4aa282d44f824e12aa800ee.tar.gz
lwn-5160b129f65fc6e1a4aa282d44f824e12aa800ee.zip
lan78xx: Enable 125 MHz CLK configuration for LAN7801 if NO EEPROM is detected
The 125MHz and 25MHz clock configurations are enabled in the initialization regardless of EEPROM (125MHz is needed for RGMII 1000Mbps operation). After a lite reset (lan78xx_reset), these contents go back to defaults(all 0, so no 125MHz or 25MHz clock). Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Rengarajan S <rengarajan.s@microchip.com> Link: https://lore.kernel.org/r/20240529140256.1849764-2-rengarajan.s@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-rw-r--r--drivers/net/usb/lan78xx.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
index 7a5cc49ebec6..2472216564e7 100644
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
@@ -2941,6 +2941,8 @@ static int lan78xx_reset(struct lan78xx_net *dev)
return ret;
buf |= HW_CFG_MEF_;
+ buf |= HW_CFG_CLK125_EN_;
+ buf |= HW_CFG_REFCLK25_EN_;
ret = lan78xx_write_reg(dev, HW_CFG, buf);
if (ret < 0)