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| author | Christian König <christian.koenig@amd.com> | 2015-02-19 09:40:28 +0100 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2015-04-09 13:14:00 +0200 |
| commit | 505796d575bc1d23aeb995b16f557e69d26e5dad (patch) | |
| tree | bf5dd7a63d893117b5a10885ef48fcbdda85a13c | |
| parent | 0ba712aad5c6230497650bb508608a4d9cbf55f2 (diff) | |
| download | lwn-505796d575bc1d23aeb995b16f557e69d26e5dad.tar.gz lwn-505796d575bc1d23aeb995b16f557e69d26e5dad.zip | |
drm/radeon: drop setting UPLL to sleep mode
commit a17d4996e051e78d164989b894608cf37cd5110b upstream.
Just keep it working, seems to fix some PLL problems.
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=73378
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 6301b3638bb4..c9f229f2048a 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -6819,8 +6819,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); if (!vclk || !dclk) { - /* keep the Bypass mode, put PLL to sleep */ - WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK); + /* keep the Bypass mode */ return 0; } @@ -6836,8 +6835,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) /* set VCO_MODE to 1 */ WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK); - /* toggle UPLL_SLEEP to 1 then back to 0 */ - WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK); + /* disable sleep mode */ WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK); /* deassert UPLL_RESET */ |