diff options
| author | Cristian Ciocaltea <cristian.ciocaltea@collabora.com> | 2023-09-07 20:10:01 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-09-11 13:34:34 +0100 |
| commit | 4bb5870ab60abca6ad18196090831b5e4cf82d93 (patch) | |
| tree | bfcf0cb9e8a01a24c633dcf11964c766557f10ff | |
| parent | a9a3f54a23d844971c274f352500dddeadb4412c (diff) | |
| download | lwn-4bb5870ab60abca6ad18196090831b5e4cf82d93.tar.gz lwn-4bb5870ab60abca6ad18196090831b5e4cf82d93.zip | |
ASoC: cs35l41: Handle mdsync_up reg write errors
The return code of regmap_multi_reg_write() call related to "MDSYNC up"
sequence is shadowed by the subsequent regmap_read_poll_timeout()
invocation, which will hit a timeout in case the write operation above
fails.
Make sure cs35l41_global_enable() returns the correct error code instead
of -ETIMEDOUT.
Additionally, to be able to distinguish between the timeouts of
wait_for_completion_timeout() and regmap_read_poll_timeout(), print an
error message for the former and return immediately. This also avoids
having to wait unnecessarily for the second time.
Fixes: f8264c759208 ("ALSA: cs35l41: Poll for Power Up/Down rather than waiting a fixed delay")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/r/20230907171010.1447274-3-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/cs35l41-lib.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c index a018f1d98428..a6c6bb23b957 100644 --- a/sound/soc/codecs/cs35l41-lib.c +++ b/sound/soc/codecs/cs35l41-lib.c @@ -1251,15 +1251,18 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4 ret = wait_for_completion_timeout(pll_lock, msecs_to_jiffies(1000)); if (ret == 0) { - ret = -ETIMEDOUT; - } else { - regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3); - pwr_ctrl3 |= CS35L41_SYNC_EN_MASK; - cs35l41_mdsync_up_seq[0].def = pwr_ctrl3; - ret = regmap_multi_reg_write(regmap, cs35l41_mdsync_up_seq, - ARRAY_SIZE(cs35l41_mdsync_up_seq)); + dev_err(dev, "Timed out waiting for pll_lock\n"); + return -ETIMEDOUT; } + regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3); + pwr_ctrl3 |= CS35L41_SYNC_EN_MASK; + cs35l41_mdsync_up_seq[0].def = pwr_ctrl3; + ret = regmap_multi_reg_write(regmap, cs35l41_mdsync_up_seq, + ARRAY_SIZE(cs35l41_mdsync_up_seq)); + if (ret) + return ret; + ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status, int_status & pup_pdn_mask, 1000, 100000); |