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author | Geert Uytterhoeven <geert+renesas@linux-m68k.org> | 2014-01-21 13:59:17 +0100 |
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committer | Brian Norris <computersforpeace@gmail.com> | 2014-01-27 21:19:28 -0800 |
commit | 464e906737d6eba2fe63e913e0df4306423b4f61 (patch) | |
tree | e441fb9017937efcc86603098eb433ad68bb829b | |
parent | d8d5d10d0f27d1975e71617efff941321a0dc142 (diff) | |
download | lwn-464e906737d6eba2fe63e913e0df4306423b4f61.tar.gz lwn-464e906737d6eba2fe63e913e0df4306423b4f61.zip |
mtd: m25p80: Set rx_nbits for Quad SPI transfers
When using the Quad Read opcode, SPI masters still use Single SPI
transfers, as spi_transfer.rx_nbits defaults to SPI_NBITS_SINGLE.
Use SPI_NBITS_QUAD to fix this.
While an earlier version of commit 3487a63955c34ea508bcf4ca5131ddd953876e2d
("drivers: mtd: m25p80: add quad read support") did this correctly, it was
forgotten in the version that got merged.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-rw-r--r-- | drivers/mtd/devices/m25p80.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 320c6a308630..ad1913909702 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -489,6 +489,16 @@ static inline int m25p80_dummy_cycles_read(struct m25p *flash) } } +static inline unsigned int m25p80_rx_nbits(const struct m25p *flash) +{ + switch (flash->flash_read) { + case M25P80_QUAD: + return 4; + default: + return 0; + } +} + /* * Read an address range from the flash chip. The address range * may be any size provided it is within the physical boundaries. @@ -519,6 +529,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, spi_message_add_tail(&t[0], &m); t[1].rx_buf = buf; + t[1].rx_nbits = m25p80_rx_nbits(flash); t[1].len = len; spi_message_add_tail(&t[1], &m); |