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authorHelge Deller <deller@gmx.de>2022-05-08 18:25:00 +0200
committerHelge Deller <deller@gmx.de>2022-05-08 20:01:12 +0200
commit340233dcc0160aafcce46ca893d1679f16acf409 (patch)
tree48e7d97e79a1991a5817475cd080e0ba0c87e331
parenta65bcad5421507c2f6c52e1e2ca6a6ce02fd1ad6 (diff)
downloadlwn-340233dcc0160aafcce46ca893d1679f16acf409.tar.gz
lwn-340233dcc0160aafcce46ca893d1679f16acf409.zip
parisc: Mark cr16 clock unstable on all SMP machines
The cr16 interval timers are not synchronized across CPUs, even with just one dual-core CPU. This becomes visible if the machines have a longer uptime. Signed-off-by: Helge Deller <deller@gmx.de>
-rw-r--r--arch/parisc/kernel/time.c27
1 files changed, 4 insertions, 23 deletions
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 19c31a72fe76..9714fbd7c42d 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -251,33 +251,14 @@ void __init time_init(void)
static int __init init_cr16_clocksource(void)
{
/*
- * The cr16 interval timers are not syncronized across CPUs on
- * different sockets, so mark them unstable and lower rating on
- * multi-socket SMP systems.
+ * The cr16 interval timers are not synchronized across CPUs.
*/
if (num_online_cpus() > 1 && !running_on_qemu) {
- int cpu;
- unsigned long cpu0_loc;
- cpu0_loc = per_cpu(cpu_data, 0).cpu_loc;
-
- for_each_online_cpu(cpu) {
- if (cpu == 0)
- continue;
- if ((cpu0_loc != 0) &&
- (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc))
- continue;
-
- clocksource_cr16.name = "cr16_unstable";
- clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
- clocksource_cr16.rating = 0;
- break;
- }
+ clocksource_cr16.name = "cr16_unstable";
+ clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
+ clocksource_cr16.rating = 0;
}
- /* XXX: We may want to mark sched_clock stable here if cr16 clocks are
- * in sync:
- * (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */
-
/* register at clocksource framework */
clocksource_register_hz(&clocksource_cr16,
100 * PAGE0->mem_10msec);