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author | Huang Rui <ray.huang@amd.com> | 2018-11-29 18:46:54 +0800 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-03-19 15:03:54 -0500 |
commit | 2da5410bf4c974546f90c1262684f009c6f4a9da (patch) | |
tree | a8e3dddfee26bcb51fb992a8955588355a2831ad | |
parent | fad3ecf2359b564fa6e3ef7e87f44dd17947ab82 (diff) | |
download | lwn-2da5410bf4c974546f90c1262684f009c6f4a9da.tar.gz lwn-2da5410bf4c974546f90c1262684f009c6f4a9da.zip |
drm/amdgpu: enable new smu ip block for vega20
Switch to new smu ip block since vega20.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 36158db6a82e..3bf5580d6747 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -63,6 +63,7 @@ #include "vcn_v1_0.h" #include "dce_virtual.h" #include "mxgpu_ai.h" +#include "amdgpu_smu.h" #define mmMP0_MISC_CGTT_CTRL0 0x01b9 #define mmMP0_MISC_CGTT_CTRL0_BASE_IDX 0 @@ -603,8 +604,12 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) } amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); - if (!amdgpu_sriov_vf(adev)) - amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (!amdgpu_sriov_vf(adev)) { + if (amdgpu_dpm == 1 && adev->asic_type >= CHIP_VEGA20) + amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); + else + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + } if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); #if defined(CONFIG_DRM_AMD_DC) |