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| author | Alex Deucher <alexander.deucher@amd.com> | 2017-09-02 02:16:35 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-12 14:32:43 -0400 |
| commit | 29c3035fe385b4214fc0515b9cd0ff53d23b4e82 (patch) | |
| tree | b0c170a491a30657f1d4ec74c278363623d6ef01 | |
| parent | 298e87c95f9c8c2f33d274e92568c6b83ac999a5 (diff) | |
| download | lwn-29c3035fe385b4214fc0515b9cd0ff53d23b4e82.tar.gz lwn-29c3035fe385b4214fc0515b9cd0ff53d23b4e82.zip | |
drm/amdgpu/gfx9: properly set the hdp flush reg for Raven
Was only being assigned for vega10.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 2ab049c45b1d..72dbf890c65b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -3504,7 +3504,9 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) u32 ref_and_mask, reg_mem_engine; struct nbio_hdp_flush_reg *nbio_hf_reg; - if (ring->adev->asic_type == CHIP_VEGA10) + if (ring->adev->flags & AMD_IS_APU) + nbio_hf_reg = &nbio_v7_0_hdp_flush_reg; + else nbio_hf_reg = &nbio_v6_1_hdp_flush_reg; if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) { |