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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-06-20 15:57:36 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-07-01 11:35:08 +0200 |
| commit | 2918674704aad620215c41979a331021fe3f1ec4 (patch) | |
| tree | 99c349f4600eefd7c198943b498d950828c1fde0 | |
| parent | ecbc5206a1a0532258144a4703cccf4e70f3fe6c (diff) | |
| download | lwn-2918674704aad620215c41979a331021fe3f1ec4.tar.gz lwn-2918674704aad620215c41979a331021fe3f1ec4.zip | |
arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer IRQ
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/834244e77e5f407ee6fab1ab5c10c98a8a933085.1718890849.git.geert+renesas@glider.be
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 8448afa8be54..1de2e5f0917d 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -1342,6 +1342,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; |