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author | James Morse <james.morse@arm.com> | 2019-10-17 18:43:00 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-10-25 17:48:44 +0100 |
commit | 222fc0c8503d98cec3cb2bac2780cdd21a6e31c0 (patch) | |
tree | d98f429a05372715a4a22aa37d9df75e9f8715d5 | |
parent | ee9d90be9ddace01b7fb126567e4b539fbe1f82f (diff) | |
download | lwn-222fc0c8503d98cec3cb2bac2780cdd21a6e31c0.tar.gz lwn-222fc0c8503d98cec3cb2bac2780cdd21a6e31c0.zip |
arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space
Compat user-space is unable to perform ICIMVAU instructions from
user-space. Instead it uses a compat-syscall. Add the workaround for
Neoverse-N1 #1542419 to this code path.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r-- | arch/arm64/kernel/sys_compat.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c index f1cb64959427..c9fb02927d3e 100644 --- a/arch/arm64/kernel/sys_compat.c +++ b/arch/arm64/kernel/sys_compat.c @@ -8,6 +8,7 @@ */ #include <linux/compat.h> +#include <linux/cpufeature.h> #include <linux/personality.h> #include <linux/sched.h> #include <linux/sched/signal.h> @@ -17,6 +18,7 @@ #include <asm/cacheflush.h> #include <asm/system_misc.h> +#include <asm/tlbflush.h> #include <asm/unistd.h> static long @@ -30,6 +32,15 @@ __do_compat_cache_op(unsigned long start, unsigned long end) if (fatal_signal_pending(current)) return 0; + if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) { + /* + * The workaround requires an inner-shareable tlbi. + * We pick the reserved-ASID to minimise the impact. + */ + __tlbi(aside1is, 0); + dsb(ish); + } + ret = __flush_cache_user_range(start, start + chunk); if (ret) return ret; |