summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPierre-Hugues Husson <phhusson@freebox.fr>2024-06-04 18:44:24 +0200
committerBjorn Andersson <andersson@kernel.org>2024-07-02 09:58:23 -0500
commit1c6285e10d76b0cfb5b0384dc9c02e266a2ffd0a (patch)
tree3db2005289513ee526a74ab2c9d8654b1fdd2946
parent818c2676e5816dad5a77df5a1c0d99d0e160d0b1 (diff)
downloadlwn-1c6285e10d76b0cfb5b0384dc9c02e266a2ffd0a.tar.gz
lwn-1c6285e10d76b0cfb5b0384dc9c02e266a2ffd0a.zip
arm64: dts: qcom: msm8998: add venus node
Now that the venus clocks are fixed, we can add the DT node. Signed-off-by: Pierre-Hugues Husson <phhusson@freebox.fr> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Vikash Garodia <quic_vgarodia@quicinc.com> Link: https://lore.kernel.org/r/6d86a6a3-4d99-4fda-9a38-7688587237e6@freebox.fr Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8998.dtsi48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 3c94d823a514..99f811a57ac5 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -3000,6 +3000,54 @@
};
};
+ venus: video-codec@cc00000 {
+ compatible = "qcom,msm8998-venus";
+ reg = <0x0cc00000 0xff000>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&mmcc VIDEO_TOP_GDSC>;
+ clocks = <&mmcc VIDEO_CORE_CLK>,
+ <&mmcc VIDEO_AHB_CLK>,
+ <&mmcc VIDEO_AXI_CLK>,
+ <&mmcc VIDEO_MAXI_CLK>;
+ clock-names = "core", "iface", "bus", "mbus";
+ iommus = <&mmss_smmu 0x400>,
+ <&mmss_smmu 0x401>,
+ <&mmss_smmu 0x40a>,
+ <&mmss_smmu 0x407>,
+ <&mmss_smmu 0x40e>,
+ <&mmss_smmu 0x40f>,
+ <&mmss_smmu 0x408>,
+ <&mmss_smmu 0x409>,
+ <&mmss_smmu 0x40b>,
+ <&mmss_smmu 0x40c>,
+ <&mmss_smmu 0x40d>,
+ <&mmss_smmu 0x410>,
+ <&mmss_smmu 0x421>,
+ <&mmss_smmu 0x428>,
+ <&mmss_smmu 0x429>,
+ <&mmss_smmu 0x42b>,
+ <&mmss_smmu 0x42c>,
+ <&mmss_smmu 0x42d>,
+ <&mmss_smmu 0x411>,
+ <&mmss_smmu 0x431>;
+ memory-region = <&venus_mem>;
+ status = "disabled";
+
+ video-decoder {
+ compatible = "venus-decoder";
+ clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
+ clock-names = "core";
+ power-domains = <&mmcc VIDEO_SUBCORE0_GDSC>;
+ };
+
+ video-encoder {
+ compatible = "venus-encoder";
+ clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
+ clock-names = "core";
+ power-domains = <&mmcc VIDEO_SUBCORE1_GDSC>;
+ };
+ };
+
mmss_smmu: iommu@cd00000 {
compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
reg = <0x0cd00000 0x40000>;