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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-03-18 19:55:58 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2015-05-11 15:00:09 +0900 |
| commit | 1c2a7eb7169b855f6c3e9db036c6767052528ffe (patch) | |
| tree | 40bec994e7d0bdb078af31e77a68a2abb27aab60 | |
| parent | dfaac7b7e4015ca2e690c7ea4421aec1405de966 (diff) | |
| download | lwn-1c2a7eb7169b855f6c3e9db036c6767052528ffe.tar.gz lwn-1c2a7eb7169b855f6c3e9db036c6767052528ffe.zip | |
ARM: shmobile: r8a73a4: Add IRQC clock to device tree
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module
clock, so they can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: corrected typo in changelog to refer to r8a73a4]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r8a73a4.dtsi | 11 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a73a4-clock.h | 1 |
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 0fd889f88109..7ee22a41c6c9 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -163,6 +163,7 @@ <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>, <0 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -197,6 +198,7 @@ <0 55 IRQ_TYPE_LEVEL_HIGH>, <0 56 IRQ_TYPE_LEVEL_HIGH>, <0 57 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -724,15 +726,16 @@ mstp4_clks: mstp4_clks@e6150140 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; - clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_HP>, + clocks = <&main_div2_clk>, <&main_div2_clk>, + <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks R8A73A4_CLK_HP>; #clock-cells = <1>; clock-indices = < - R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4 - R8A73A4_CLK_IIC3 + R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5 + R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3 >; clock-output-names = - "iic5", "iic4", "iic3"; + "irqc", "iic5", "iic4", "iic3"; }; mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h index 9a4b4c9ca44a..dd11ecdf837e 100644 --- a/include/dt-bindings/clock/r8a73a4-clock.h +++ b/include/dt-bindings/clock/r8a73a4-clock.h @@ -54,6 +54,7 @@ #define R8A73A4_CLK_IIC3 11 #define R8A73A4_CLK_IIC4 10 #define R8A73A4_CLK_IIC5 9 +#define R8A73A4_CLK_IRQC 7 /* MSTP5 */ #define R8A73A4_CLK_THERMAL 22 |