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| author | Niklas Cassel <niklas.cassel@axis.com> | 2018-02-21 09:59:53 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-06 17:39:50 +0100 |
| commit | 0fc123744e8fbe6dd933b5ef2892e4c70d2f2fb3 (patch) | |
| tree | 2b0ac572323cc1bd5939031ec223cfe168fb5fb7 | |
| parent | 661e50bc853209e41a5c14a290ca4decc43cbfd1 (diff) | |
| download | lwn-0fc123744e8fbe6dd933b5ef2892e4c70d2f2fb3.tar.gz lwn-0fc123744e8fbe6dd933b5ef2892e4c70d2f2fb3.zip | |
ARM: dts: artpec: disable Accelerator Coherency Port
Accesses via 0x80000000 go through the ACP instead of using the DDR
directly.
Unfortunately the ACP has proven to be the cause of complete system
hangs. Disabling the ACP makes these problems go away.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/artpec6.dtsi | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi index 2ed11773048d..d9776a97d8ff 100644 --- a/arch/arm/boot/dts/artpec6.dtsi +++ b/arch/arm/boot/dts/artpec6.dtsi @@ -185,8 +185,7 @@ #address-cells = <0x1>; #size-cells = <0x1>; ranges; - dma-ranges = <0x80000000 0x00000000 0x40000000>; - dma-coherent; + dma-ranges; ethernet: ethernet@f8010000 { clock-names = "phy_ref_clk", "apb_pclk"; |