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authorUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>2024-06-27 16:51:05 -0700
committerUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>2024-06-28 11:52:29 -0700
commit0f54a19262154cb3965ba910c8b081417d97c6c8 (patch)
tree3f392186f1badc9bb92d42f8bcdece38d62299fc
parente71cf19e3119de446cc37ddabb2e161ebbf7357c (diff)
downloadlwn-0f54a19262154cb3965ba910c8b081417d97c6c8.tar.gz
lwn-0f54a19262154cb3965ba910c8b081417d97c6c8.zip
drm/xe: Get hwe domain specific FW to read RING_TIMESTAMP
Per client engine utilization uses RING_TIMESTAMP to return drm-total-cycles to the user. Current code uses XE_FW_GT to read this register on the first available engine in a GT. When testing on DG2, it is observed that this value is 0 when running test on some engines. To resolve that, get the hwe domain specific FW for reading the engine timestamp. v2: - update commit message - use domain specific FW (Matt) v3: - Drop check for hwe in the helper (Matt, Michal) v4: - checkpatch fixes v5: Rebase Fixes: 188ced1e0ff8 ("drm/xe/client: Print runtime to fdinfo") Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240627235105.2631135-1-umesh.nerlige.ramappa@intel.com
-rw-r--r--drivers/gpu/drm/xe/xe_drm_client.c7
-rw-r--r--drivers/gpu/drm/xe/xe_hw_engine.c5
-rw-r--r--drivers/gpu/drm/xe/xe_hw_engine.h1
3 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/xe_drm_client.c b/drivers/gpu/drm/xe/xe_drm_client.c
index 4bdb909eabfc..6a26923fa10e 100644
--- a/drivers/gpu/drm/xe/xe_drm_client.c
+++ b/drivers/gpu/drm/xe/xe_drm_client.c
@@ -260,17 +260,20 @@ static void show_run_ticks(struct drm_printer *p, struct drm_file *file)
/* Get the total GPU cycles */
for_each_gt(gt, xe, gt_id) {
+ enum xe_force_wake_domains fw;
+
hwe = xe_gt_any_hw_engine(gt);
if (!hwe)
continue;
- if (xe_force_wake_get(gt_to_fw(gt), XE_FW_GT)) {
+ fw = xe_hw_engine_to_fw_domain(hwe);
+ if (xe_force_wake_get(gt_to_fw(gt), fw)) {
hwe = NULL;
break;
}
gpu_timestamp = xe_hw_engine_read_timestamp(hwe);
- XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FW_GT));
+ XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), fw));
break;
}
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 78b50d3a6501..07ed9fd28f19 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -1130,3 +1130,8 @@ u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe)
{
return xe_mmio_read64_2x32(hwe->gt, RING_TIMESTAMP(hwe->mmio_base));
}
+
+enum xe_force_wake_domains xe_hw_engine_to_fw_domain(struct xe_hw_engine *hwe)
+{
+ return engine_infos[hwe->engine_id].domain;
+}
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index 7f2d27c0ba1a..900c8c991430 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -69,5 +69,6 @@ static inline bool xe_hw_engine_is_valid(struct xe_hw_engine *hwe)
const char *xe_hw_engine_class_to_str(enum xe_engine_class class);
u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe);
+enum xe_force_wake_domains xe_hw_engine_to_fw_domain(struct xe_hw_engine *hwe);
#endif