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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-09-09 12:30:18 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-09-10 11:48:13 +0100 |
| commit | 0efa99dd58754d23e884b9ba41cd601f01b58c3d (patch) | |
| tree | a8b939d68da958d6b3d3688f04390b17cf20a4fb | |
| parent | 198d2533669bbe162e52eee2c35ddd8594967556 (diff) | |
| download | lwn-0efa99dd58754d23e884b9ba41cd601f01b58c3d.tar.gz lwn-0efa99dd58754d23e884b9ba41cd601f01b58c3d.zip | |
drm/i915/ringbuffer: Flush writes before RING_TAIL update
Be paranoid and make sure we flush any and all writes out of the WCB
before performing the UC mmio to update the RING_TAIL. (An UC write
should itself be enough to do the flush, hence the paranoia here.) Quite
infrequently, we see problems where the GPU seems to overshoot the
RING_TAIL and so executes garbage, hence the speculation.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111598
References: https://bugs.freedesktop.org/show_bug.cgi?id=111417
References: https://bugs.freedesktop.org/show_bug.cgi?id=111034
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190909113018.13300-1-chris@chris-wilson.co.uk
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c index ac55a0d054bd..a73296e6b13d 100644 --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c @@ -930,6 +930,7 @@ static void cancel_requests(struct intel_engine_cs *engine) static void i9xx_submit_request(struct i915_request *request) { i915_request_submit(request); + wmb(); /* paranoid flush writes out of the WCB before mmio */ ENGINE_WRITE(request->engine, RING_TAIL, intel_ring_set_tail(request->ring, request->tail)); |