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| author | William Qiu <william.qiu@starfivetech.com> | 2023-08-04 10:02:52 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-08-04 13:29:49 +0100 |
| commit | 0d2b6a1b8515204924b9174ae0135e1f4ff29b21 (patch) | |
| tree | 9c5623fa3da9a16610a9384cca51477bfbf8459a | |
| parent | ffae65fb1ae4738151158b4435fad822cb1ca29c (diff) | |
| download | lwn-0d2b6a1b8515204924b9174ae0135e1f4ff29b21.tar.gz lwn-0d2b6a1b8515204924b9174ae0135e1f4ff29b21.zip | |
dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
The QSPI controller needs three clock items to work properly on StarFive
JH7110 SoC, so there is need to change the maxItems's value to 3.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230804020254.291239-2-william.qiu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 4f15f9a0cc34..cca81f89e252 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -86,7 +86,17 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: ref + - items: + - const: ref + - const: ahb + - const: apb cdns,fifo-depth: description: |