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| author | Pratap Nirujogi <pratap.nirujogi@amd.com> | 2024-05-16 02:39:14 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-06-27 17:34:40 -0400 |
| commit | 062666ffbc80e15154315550d2aa171c23e76c61 (patch) | |
| tree | 7ac0b663817023ee68ac9b39a41c3584962f69c4 | |
| parent | 05bafe95e580587ff5febf8ce242fa2f401a1f17 (diff) | |
| download | lwn-062666ffbc80e15154315550d2aa171c23e76c61.tar.gz lwn-062666ffbc80e15154315550d2aa171c23e76c61.zip | |
drm/amd/amdgpu: Disable MMHUB prefetch for ISP v4.1.1
Disable MMHUB prefetch for ISP v4.1.1 as a temporary WA until
the GART supports MMHUB TLSi and SAW for ISP HW to access
GART memory using the TLSi path.
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Pratap Nirujogi <pratap.nirujogi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.h | 7 |
2 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c b/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c index 4e17fa03f7b5..67f95f05ecca 100644 --- a/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c +++ b/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c @@ -104,6 +104,18 @@ static int isp_v4_1_1_hw_init(struct amdgpu_isp *isp) goto failure; } + /* + * Temporary WA added to disable MMHUB TLSi until the GART initialization + * is ready to support MMHUB TLSi and SAW for ISP HW to access GART memory + * using the TLSi path + */ + WREG32(mmDAGB1_WRCLI5_V4_1_1 >> 2, 0xFE5FEAA8); + WREG32(mmDAGB1_WRCLI9_V4_1_1 >> 2, 0xFE5FEAA8); + WREG32(mmDAGB1_WRCLI10_V4_1_1 >> 2, 0xFE5FEAA8); + WREG32(mmDAGB1_WRCLI14_V4_1_1 >> 2, 0xFE5FEAA8); + WREG32(mmDAGB1_WRCLI19_V4_1_1 >> 2, 0xFE5FEAA8); + WREG32(mmDAGB1_WRCLI20_V4_1_1 >> 2, 0xFE5FEAA8); + return 0; failure: diff --git a/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.h b/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.h index dfb9522c9d6a..6bfb1de191a0 100644 --- a/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.h +++ b/drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.h @@ -32,6 +32,13 @@ #include "ivsrcid/isp/irqsrcs_isp_4_1.h" +#define mmDAGB1_WRCLI5_V4_1_1 0x68420 +#define mmDAGB1_WRCLI9_V4_1_1 0x68430 +#define mmDAGB1_WRCLI10_V4_1_1 0x68434 +#define mmDAGB1_WRCLI14_V4_1_1 0x68444 +#define mmDAGB1_WRCLI19_V4_1_1 0x68458 +#define mmDAGB1_WRCLI20_V4_1_1 0x6845C + #define MAX_ISP411_INT_SRC 8 void isp_v4_1_1_set_isp_funcs(struct amdgpu_isp *isp); |