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authorBruno Randolf <randolf.bruno@googlemail.com>2010-07-12 00:40:28 +0900
committerGreg Kroah-Hartman <gregkh@suse.de>2010-08-02 10:30:22 -0700
commit01b9cd5d1870fb45aa398124366fe872255b523c (patch)
tree85d163ce62a82ad3ebdf183bb5755f116a8fc38e
parent61ef6cc2a3140bab5d4e359cdd4a71bcea7c0fc3 (diff)
downloadlwn-01b9cd5d1870fb45aa398124366fe872255b523c.tar.gz
lwn-01b9cd5d1870fb45aa398124366fe872255b523c.zip
MIPS: MTX-1: Fix PCI on the MeshCube and related boards
commit 98a0f86a54bb195c28ae1ccb5a5f5cda12cf7121 upstream. This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1: Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke PCI bus operation. The problem is caused by alchemy_gpio2_enable() which resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected to GPIO2 and they obviously do not to like the reset. Since GPIO2 is correctly initialized by the boot monitor (YAMON) it is not necessary to call this function, so just remove it. Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid problems in case gpiolib gets initialized after PCI. And since alchemy gpio_set_value() calls au_sync() we don't have to au_sync() again later. Signed-off-by: Bruno Randolf <br1@einfach.org> To: linux-mips@linux-mips.org To: manuel.lauss@googlemail.com Patchwork: https://patchwork.linux-mips.org/patch/1448/ Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--arch/mips/alchemy/mtx-1/board_setup.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index a9f0336e1f1f..52d883d37dd7 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -67,8 +67,6 @@ static void mtx1_power_off(void)
void __init board_setup(void)
{
- alchemy_gpio2_enable();
-
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
/* Enable USB power switch */
alchemy_gpio_direction_output(204, 0);
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
if (assert && devsel != 0)
/* Suppress signal to Cardbus */
- gpio_set_value(1, 0); /* set EXT_IO3 OFF */
+ alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
else
- gpio_set_value(1, 1); /* set EXT_IO3 ON */
+ alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */
- au_sync_udelay(1);
+ udelay(1);
return 1;
}