/*
* Copyright 2012 ST-Ericsson AB
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href.dtsi"
/ {
model = "ST-Ericsson HREF (v60+) platform with Device Tree";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
soc {
// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
mmc-cap-sd-highspeed;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux3_reg>;
cd-gpios = <&gpio2 31 0x4>; // 95
status = "okay";
};
// WLAN SDIO channel
sdi1_per2@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
status = "okay";
};
// PoP:ed eMMC
sdi2_per3@80005000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
status = "okay";
};
// On-board eMMC
sdi4_per2@80114000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux2_reg>;
status = "okay";
};
pinctrl {
/* Set this up using hogs */
pinctrl-names = "default";
pinctrl-0 = <&ipgpio_hrefv60_mode>;
sdi0 {
/* SD card detect GPIO pin, extend default state */
sdi0_default_mode: sdi0_default {
default_hrefv60_cfg1 {
ste,pins = "GPIO95_E8";
ste,config = <&gpio_in_pu>;
};
};
};
ipgpio {
/*
* XENON Flashgun on image processor GPIO (controlled from image
* processor firmware), mux in these image processor GPIO lines 0
* (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
* LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
* from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
*/
ipgpio_hrefv60_mode: ipgpio_hrefv60 {
hrefv60_mux {
ste,function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
};
hrefv60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5";
ste,config = <&in_pu>;
};
hrefv60_cfg2 {
ste,pins = "GPIO21_AB3";
ste,config = <&gpio_out_lo>;
};
hrefv60_cfg3 {
ste,pins = "GPIO64_F3";
ste,config = <&out_lo>;
};
};
};
mcde {
lcd_hrefv60_mode: lcd_hrefv60 {
/*
* Display Interface 1 uses GPIO 65 for RST (reset).
* Display Interface 2 uses GPIO 66 for RST (reset).
* Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
*/
hrefv60_cfg1 {
ste,pins ="GPIO65_F1";
ste,config = <&gpio_out_hi>;
};
hrefv60_cfg2 {
ste,pins ="GPIO66_G3";
ste,config = <&gpio_out_lo>;
};
};
};
};
};
};
